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Design

Intern – DRAM Technology Physical Design and Block-Level PPA Optimization

Micron

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Hours
Part time
Where
Boise, ID - Main Site
Posted
2 days ago

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

The Design Technology Co-Optimization (DTCO) team works at the intersection of process technology, standard cell architecture, and design implementation to optimize power, performance, and area (PPA) for advanced memory products. The team collaborates closely with standard cell library, RTL, and physical design engineers to evaluate design tradeoffs and develop methodologies that improve silicon outcomes.

As a DTCO Intern, you will gain hands-on experience assessing and optimizing PPA at the standard cell and logic block level.

What you'd do

  • Implement standard cell logic blocks using industry-standard physical design tools, including floorplanning, placement, clock tree synthesis (CTS), routing, and optimization activities focused on PPA assessment.
  • Analyze and benchmark power, performance, and area across standard cell libraries and logic block configurations, identifying opportunities for improvement.
  • Perform static timing analysis (STA), investigate setup and hold timing violations, and support timing closure activities.
  • Execute physical verification checks, including DRC, LVS, and IR-drop analysis, and assist with resolving design issues.
  • Leverage Generative AI, AI Assistants, and Agentic AI solutions to automate data collection, reporting, comparison, and workflow optimization for PPA analysis.

What they want

  • Currently pursuing a B.S. or M.S. degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • Demonstrated understanding of VLSI design concepts, CMOS circuits, digital logic, and the ASIC physical design flow.
  • Experience through coursework, research, or projects using scripting languages such as Python, Perl, or TCL.
  • Strong analytical, problem-solving, and debugging skills with attention to technical detail.
  • Expected graduation date of Fall 2025 or later.
Starts
2026-09-21